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111	Comparative analysis between QuickThread and Intel® Threading Building Blocks (TBB) Copyright © 2009 QuickThread Programming, LLC www.quickthreadprogramming.com Add to Reading List Source URL: www.quickthreadprogramming.com Language: English - Date: 2012-05-03 14:20:38 Parallel computing Concurrent computing Application programming interfaces Software design patterns Central processing unit Threading Building Blocks Thread OpenMP Monitor CPU cache C++11 Multithreading
112	Paper Title (use style: paper title) Add to Reading List Source URL: mesl.ucsd.edu Language: English - Date: 2012-04-03 01:39:08 Central processing unit Microprocessors Microcomputers Telecommunications engineering Clock signal Instruction set
113	Designing and Building Applications for Extreme Scale Systems CS598 William Gropp www.cs.illinois.edu/~wgropp Add to Reading List Source URL: wgropp.cs.illinois.edu Language: English - Date: 2015-01-14 21:48:04 Parallel computing Free software Numerical linear algebra Bill Gropp MPICH Portable Extensible Toolkit for Scientific Computation Educational technology Central processing unit Message Passing Interface
114	Chapter 1 Performance Measures Reading: The corresponding chapter in the 2nd edition is Chapter 2, in the 3rd edition it is Chapter 4 and in the 4th edition it is Chapter 1. When selecting a computer, there are differen Add to Reading List Source URL: eceweb.ucsd.edu Language: English - Date: 2015-07-31 19:30:10 Central processing unit Clock signal Computer performance Instruction set architectures Cycles per instruction Rates MIPS instruction set Instructions per second Clock rate CPU time Protection ring Computer
115	TACO0903-20 ACM-TRANSACTION September 14, 2012 Add to Reading List Source URL: www.des.udc.es Language: English - Date: 2014-06-30 07:11:02 Compiler optimizations Cache Computer memory Computer architecture CPU cache Central processing unit For loop Infinite loop
116	T9000 - superscalar transputer Richard Forsyth Bob Krysiak Roger Shepherd INrvl0S Limited - SGS-Thomson Microelectronics Add to Reading List Source URL: www.hotchips.org Language: English - Date: 2013-07-27 22:44:50 Central processing unit Stack machines Microprocessors Parallel computing Transputer Computer architecture Processor register CPU cache IDL Instruction set
117	Advanced Parallel Architecture Annalisa Massini Vector architecture 2 Add to Reading List Source URL: twiki.di.uniroma1.it Language: English - Date: 2015-04-28 17:33:30 Central processing unit Parallel computing Computer architecture Supercomputers Instruction set architectures Processor register Cray-1 MIPS instruction set SIMD Instruction set 64-bit computing Euclidean vector
118	Lecture 4: Modeling Sparse Matrix-Vector Multiply William Gropp www.cs.illinois.edu/~wgropp Sustained Memory Bandwidth Add to Reading List Source URL: wgropp.cs.illinois.edu Language: English - Date: 2015-01-15 10:20:20 Central processing unit Computer memory Cache Programming languages CPU cache Sparse matrix Processor register Fortran Data
119	Capability Hardware Enhanced RISC Instructions: CHERI Instruction-Set Architecture Add to Reading List Source URL: www.cl.cam.ac.uk Language: English - Date: 2015-12-01 06:21:41 Instruction set architectures Central processing unit Computer architecture Memory management Memory protection Capability-based security Pointer MIPS instruction set 64-bit computing Instruction set Reduced instruction set computing Kernel
120	1 Green Mining: Investigating Power Consumption across Versions WEB EDITION Add to Reading List Source URL: softwareprocess.es Language: English - Date: 2012-04-12 13:04:46 Computers and the environment FTP clients Firefox Mozilla Central processing unit Green computing Computer architecture Power supply unit Orders of magnitude Ubuntu

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